Sciweavers

1529 search results - page 66 / 306
» On Timing Analysis of Combinational Circuits
Sort
View
DAC
2005
ACM
14 years 11 months ago
Mapping statistical process variations toward circuit performance variability: an analytical modeling approach
A physical yet compact gate delay model is developed integrating short-channel effects and the Alpha-power law based timing model. This analytical approach accurately predicts bot...
Yu Cao, Lawrence T. Clark
TCAD
1998
119views more  TCAD 1998»
14 years 9 months ago
A controller redesign technique to enhance testability of controller-data path circuits
—We study the effect of the controller on the testability of sequential circuits composed of controllers and data paths. We show that even when all the loops of the circuit have ...
Sujit Dey, Vijay Gangaram, Miodrag Potkonjak
TCAD
2002
146views more  TCAD 2002»
14 years 9 months ago
Static scheduling of multidomain circuits for fast functional verification
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
Murali Kudlugi, Russell Tessier
DATE
2009
IEEE
140views Hardware» more  DATE 2009»
15 years 4 months ago
Imperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors
Carbon Nanotube Field-Effect Transistors (CNFETs) show big promise as extensions to silicon-CMOS because: 1) Ideal CNFETs can provide significant energy and performance benefits o...
Subhasish Mitra, Jie Zhang, Nishant Patil, Hai Wei
ICCAD
1995
IEEE
88views Hardware» more  ICCAD 1995»
15 years 1 months ago
Estimation and bounding of energy consumption in burst-mode control circuits
This paper describes two techniques to quantify energy consumption of burst-modeasynchronous(clock-less)controlcircuits. The circuit specifications consideredare extended burst-m...
Peter A. Beerel, Kenneth Y. Yun, Steven M. Nowick,...