1529 search results - page 6 / 306 » On Timing Analysis of Combinational Circuits |
DAC
2007
ACM
15 years 10 months ago
2007
ACM
Due to increased variability trends in nanoscale integrated circuits, statistical circuit analysis has become essential. We present a novel method for post-silicon analysis that g...
ICCD
2004
IEEE
15 years 6 months ago
2004
IEEE
Abstract— This paper proposes a technique for creating a combinational logic network with an output that signals when all other outputs have stabilized. The method is based on du...
DAC
1995
ACM
15 years 1 months ago
1995
ACM
Our goal is to transform a low-level circuit design into a more representation. A pre-existing tool, Tranalyze [4], takes a switch-level circuit and generates a functionally equiv...
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ICCAD
1997
IEEE
15 years 1 months ago
1997
IEEE
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
EURODAC
1994
IEEE
15 years 1 months ago
1994
IEEE
of a direct implementation of this criterion. This paper presents the first critical path finding tool based on the exact criterion. It offers therefore better results in compariso...