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» On Timing Analysis of Combinational Circuits
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TAP
2007
Springer
113views Hardware» more  TAP 2007»
15 years 4 months ago
Combining Static and Dynamic Reasoning for Bug Detection
Many static and dynamic analyses have been developed to improve program quality. Several of them are well known and widely used in practice. It is not entirely clear, however, how ...
Yannis Smaragdakis, Christoph Csallner
MICCAI
2006
Springer
15 years 10 months ago
Atlas Guided Identification of Brain Structures by Combining 3D Segmentation and SVM Classification
Abstract. This study presents a novel automatic approach for the identification of anatomical brain structures in magnetic resonance images (MRI). The method combines a fast multis...
Ayelet Akselrod-Ballin, Meirav Galun, Moshe John G...
COMCOM
2006
101views more  COMCOM 2006»
14 years 10 months ago
A combined group/tree approach for scalable many-to-many reliable multicast
Abstract--In this paper we present the design, implementation, and performance analysis of Group-Aided Multicast (GAM), a scalable many-tomany reliable multicast transport protocol...
Wonyong Yoon, Dongman Lee, Hee Yong Youn, Seung-Ik...
ICCD
2003
IEEE
134views Hardware» more  ICCD 2003»
15 years 6 months ago
An Efficient Algorithm for Calculating the Worst-case Delay due to Crosstalk
Analyzing the effect of crosstalk on delay is critical for high performance circuits. The major bottleneck in performing crosstalkinduced delay analysis is the high computational ...
Venkatesan Rajappan, Sachin S. Sapatnekar
FPGA
2004
ACM
126views FPGA» more  FPGA 2004»
15 years 3 months ago
A synthesis oriented omniscient manual editor
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
Tomasz S. Czajkowski, Jonathan Rose