1529 search results - page 91 / 306 » On Timing Analysis of Combinational Circuits |
105
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VLSID
2002
IEEE
15 years 2 months ago
2002
IEEE
We propose a timing-oriented logic optimization technique called Generalized De Morgan (GDM) transform, that integrates gate resizing, net buffering and De Morgan transformation. ...
103
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BIBE
2004
IEEE
15 years 1 months ago
2004
IEEE
As the capture and analysis of single-time-point microarray expression data becomes routine, investigators are turning to time-series expression data to investigate complex gene r...
CCGRID
2008
IEEE
15 years 4 months ago
2008
IEEE
—The research area of Multimedia Content Analysis (MMCA) considers all aspects of the automated extraction of new knowledge from large multimedia data streams and archives. In re...
DATE
2007
IEEE
15 years 4 months ago
2007
IEEE
Device scaling in new and future technologies brings along severe increase in the soft error rate of circuits, for combinational and sequential logic. Although potential solutions...
GLVLSI
2005
IEEE
15 years 3 months ago
2005
IEEE
A hierarchical scheme with cells and modules is crucial for managing design complexity during a large integrated circuit design. We present a methodology for thermal aware cell-ba...