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» On Timing Analysis of Combinational Circuits
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RTAS
2007
IEEE
15 years 4 months ago
Stochastic Metrics for Debugging the Timing Behaviour of Real-Time Systems
Stochastic analysis techniques for real-time systems model the execution time of tasks as random variables. These techniques constitute a very powerful tool to study the behaviour...
Joaquín Entrialgo, Javier García, Jo...
KDD
2000
ACM
211views Data Mining» more  KDD 2000»
15 years 1 months ago
Mining IC test data to optimize VLSI testing
We describe an application of data mining and decision analysis to the problem of die-level functional test in integrated circuit manufacturing. Integrated circuits are fabricated...
Tony Fountain, Thomas G. Dietterich, Bill Sudyka
ICCAD
2010
IEEE
125views Hardware» more  ICCAD 2010»
14 years 7 months ago
Peak current reduction by simultaneous state replication and re-encoding
Reducing circuit's peak current plays an important role in circuit reliability in deep sub-micron era. For sequential circuits, it is observed that the peak current has a str...
Junjun Gu, Gang Qu, Lin Yuan, Qiang Zhou
ISPD
1998
ACM
244views Hardware» more  ISPD 1998»
15 years 2 months ago
Analysis, reduction and avoidance of crosstalk on VLSI chips
As chip size and design density increase, coupling effects (crosstalk) between signal wires become increasingly critical to on–chip timing and even functionality. A method is pr...
Tilmann Stöhr, Markus Alt, Asmus Hetzel, J&uu...
SIGGRAPH
1996
ACM
15 years 2 months ago
Combining Frequency and Spatial Domain Information for Fast Interactive Image Noise Removal
Scratches on old films must be removed since these are more noticeable on higher definition and digital televisions. Wires that suspend actors or cars must be carefully erased dur...
Anil N. Hirani, Takashi Totsuka