1529 search results - page 97 / 306 » On Timing Analysis of Combinational Circuits |
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ICCAD
1999
IEEE
15 years 2 months ago
1999
IEEE
We consider the problem of finding an optimal clock schedule, i.e. optimal arrival times for clock signals at latches of a VLSI chip. We describe a general model which includes al...
WISES
2004
14 years 11 months ago
2004
-- Debugging software that runs on highly integrated System-on-Chip devices is complicated because conventional debug tools (like traditional In-Circuit Emulators and Logic Analyze...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
GLVLSI
2006
IEEE
15 years 3 months ago
2006
IEEE
Process variations have become a key concern of circuit designers because of their significant, yet hard to predict impact on performance and signal integrity of VLSI circuits. St...
DNA
2004
Springer
15 years 3 months ago
2004
Springer
Abstract. Speed of computation and power consumption are the two main parameters of conventional computing devices implemented in microelectronic circuits. As performance of such d...