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» On Tool Integration in High-Performance FPGA Design Flows
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CEC
2009
IEEE
15 years 1 months ago
JubiTool: Unified design flow for the Perplexus SIMD hardware accelerator
This paper presents a new unified design flow developed within the Perplexus project that aims to accelerate parallelizable data-intensive applications in the context of ubiquitous...
Olivier Brousse, Jérémie Guillot, Th...
ERSA
2010
186views Hardware» more  ERSA 2010»
14 years 7 months ago
DAPR: Design Automation for Partially Reconfigurable FPGAs
Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requirements...
Shaon Yousuf, Ann Gordon-Ross
89
Voted
ERSA
2010
187views Hardware» more  ERSA 2010»
14 years 7 months ago
An Open Source Circuit Library with Benchmarking Facilities
In this paper, we introduce the open-source PivPav backend tool for reconfigurable computing. Essentially, PivPav provides an interface to a library of digital circuits that are ke...
Mariusz Grad, Christian Plessl
78
Voted
FPL
2008
Springer
104views Hardware» more  FPL 2008»
14 years 11 months ago
A technique for minimizing power during FPGA placement
This paper considers the implementation of an annealing technique for dynamic power reduction in FPGAs. The proposed method comprises a power-aware objective function for placemen...
Kristofer Vorwerk, Madhu Raman, Julien Dunoyer, Ya...
127
Voted
DAC
2008
ACM
15 years 10 months ago
SystemCoDesigner: automatic design space exploration and rapid prototyping from behavioral models
SystemCoDesigner is an ESL tool developed at the University of Erlangen-Nuremberg, Germany. SystemCoDesigner offers a fast design space exploration and rapid prototyping of behavi...
Christian Haubelt, Thomas Schlichter, Joachim Kein...