226 search results - page 14 / 46 » On Tool Integration in High-Performance FPGA Design Flows |
APSEC
2000
IEEE
15 years 1 months ago
2000
IEEE
SOFL is a formal language and method for system specification and design. As a language it is an integration of Petri nets, Data Flow Diagrams, and VDM-SL. As a method it is a com...
DAC
2007
ACM
15 years 1 months ago
2007
ACM
Using FPGAs, a designer can separate the design process from the manufacturing flow. Therefore, the owner of a sensitive design need not expose the design to possible theft and ta...
FPGA
2006
ACM
15 years 1 months ago
2006
ACM
This report describes a preliminary evaluation of possible performance of an FPGA-like architecture for future hybrid "CMOL" circuits which combine a semiconductor-trans...
FPL
2006
Springer
15 years 1 months ago
2006
Springer
This paper presents an implementation of a high-performance network application layer parser in FPGAs. At the core of the architecture resides a pattern matcher and a parser. The ...
MSE
2003
IEEE
15 years 2 months ago
2003
IEEE
A tool has been created for use in a design course to automate integration of new components into a SystemOn-Chip (SoC). Students used this tool to implement a complete SoC Intern...