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» On Tool Integration in High-Performance FPGA Design Flows
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ICCAD
1993
IEEE
134views Hardware» more  ICCAD 1993»
15 years 1 months ago
Beyond the combinatorial limit in depth minimization for LUT-based FPGA designs
In this paper, we present an integrated approach to synthesis and mapping to go beyond the combinatorial limit set up by the depth-optimal FlowMap algorithm. The new algorithm, na...
Jason Cong, Yuzheng Ding
HPDC
1997
IEEE
15 years 1 months ago
A Secure Communications Infrastructure for High-Performance Distributed Computing
We describe a software infrastructure designed to support the development of applications that use high-speed networks to connect geographically distributed supercomputers, databa...
Ian T. Foster, Nicholas T. Karonis, Carl Kesselman...
DSD
2010
IEEE
221views Hardware» more  DSD 2010»
14 years 7 months ago
Modeling Reconfigurable Systems-on-Chips with UML MARTE Profile: An Exploratory Analysis
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jea...
91
Voted
FPL
1998
Springer
135views Hardware» more  FPL 1998»
15 years 1 months ago
Designing for Xilinx XC6200 FPGAs
With the XC6200 FPGA Xilinx introduced the first commercially available FPGA designed for reconfigurable computing. It has a completely new internal architecture, so new design alg...
Reiner W. Hartenstein, Michael Herz, Frank Gilbert
96
Voted
FPGA
2008
ACM
163views FPGA» more  FPGA 2008»
14 years 11 months ago
TORCH: a design tool for routing channel segmentation in FPGAs
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
Mingjie Lin, Abbas El Gamal