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MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
14 years 8 months ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman
EUROSYS
2007
ACM
15 years 11 months ago
Sprint: a middleware for high-performance transaction processing
Sprint is a middleware infrastructure for high performance and high availability data management. It extends the functionality of a standalone in-memory database (IMDB) server to ...
Lásaro J. Camargos, Fernando Pedone, Marcin...
PODC
2010
ACM
15 years 5 months ago
Transactional predication: high-performance concurrent sets and maps for STM
Concurrent collection classes are widely used in multi-threaded programming, but they provide atomicity only for a fixed set of operations. Software transactional memory (STM) pr...
Nathan Grasso Bronson, Jared Casper, Hassan Chafi,...
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MICRO
2010
IEEE
189views Hardware» more  MICRO 2010»
14 years 11 months ago
A Dynamically Adaptable Hardware Transactional Memory
Most Hardware Transactional Memory (HTM) implementations choose fixed version and conflict management policies at design time. While eager HTM systems store transactional state in-...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...