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» On Two Problems of Nano-PLA Design
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ANCS
2005
ACM
15 years 4 months ago
Resource mapping and scheduling for heterogeneous network processor systems
Task to resource mapping problems are encountered during (i) hardware-software co-design and (ii) performance optimization of Network Processor systems. The goal of the first pro...
Liang Yang, Tushar Gohad, Pavel Ghosh, Devesh Sinh...
DATE
2009
IEEE
79views Hardware» more  DATE 2009»
15 years 5 months ago
Solver technology for system-level to RTL equivalence checking
—Checking the equivalence of a system-level model against an RTL design is a major challenge. The reason is that usually the system-level model is written by a system architect, ...
Alfred Kölbl, Reily Jacoby, Himanshu Jain, Ca...
LCTRTS
2001
Springer
15 years 3 months ago
ILP-based Instruction Scheduling for IA-64
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
Daniel Kästner, Sebastian Winkel
SEAAI
1998
Springer
15 years 3 months ago
On theoretical backgrounds of CAD
Abstract. In the past, some information technologies (IT) have quickly been adopted by the engineering practice while the implementation of others has been slower. In the paper, th...
Ziga Turk
ICTAI
1997
IEEE
15 years 3 months ago
Toward the Optimization of a Class of Black Box Optimization Algorithms
Many black box optimization algorithms have sufcient exibility to allow them to adapt to the varying circumstances they encounter. These capabilities are of two primary sorts: 1) ...
Gang Wang, Erik D. Goodman, William F. Punch III