187 search results - page 5 / 38 » On Using Efficient Test Sequences for BIST |
DFT
2003
IEEE
15 years 2 months ago
2003
IEEE
For system-on-chip designs that contain an embedded processor, this paper present a software based diagnosis scheme that can make use of the processor to aid in diagnosis in a sca...
89
Voted
ET
1998
14 years 9 months ago
1998
This paper explores the design of efficient test sets and test-pattern generators for online BIST. The target applications are high-performance, scalable datapath circuits for whi...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
Pseudorandom test techniques are widely used for measuring the impulse response (IR) for linear devices and Volterra kernels for nonlinear devices, especially in the acoustics dom...
ISCAS
1999
IEEE
15 years 1 months ago
1999
IEEE
The main objectives of Built-In Self Test (BIST) are the design of test pattern generator circuits which achieve the highest fault coverage, require the shortest sequence of test ...
ETS
2006
IEEE
15 years 3 months ago
2006
IEEE
BIST is an attractive approach to detect delay faults due to its inherent support for at-speed test. Deterministic logic BIST (DLBIST) is a technique which was successfully applie...