—FPGAs are widely used for evaluating the error-floor performance of LDPC (low-density parity check) codes. We propose a scalable vector decoder for FPGA-based implementation of...
Xiaoheng Chen, Jingyu Kang, Shu Lin, Venkatesh Ake...
The present paper proposes an authentication scheme which relies on face biometrics and one-class Support Vector Machines. The proposed recognition procedures are based on both a ...
Paolo Abeni, Madalina Baltatu, Rosalia D'Alessandr...
Empirical evidence indicates that the training time for the support vector machine (SVM) scales to the square of the number of training data points. In this paper, we introduce the...
In this paper we construct the linear support vector machine (SVM) based on the nonlinear rescaling (NR) methodology (see [9, 11, 10] and references therein). The formulation of t...
A hybrid video coding scheme which combines fractal coding with neighbourhood vector quantisation is reported. While fractal coding exploits the redundancy present in different sc...