301 search results - page 10 / 61 » On bounding the delay of a critical path |
81
Voted
GLVLSI
2002
IEEE
15 years 2 months ago
2002
IEEE
This paper develops new techniques for detecting both stuck-open faults and resistive open faults, which result in increased delays along some paths. The improved detection of CMO...
86
Voted
ICCAD
2000
IEEE
15 years 1 months ago
2000
IEEE
ct Static timing analysis has traditionally used the PERT method for identifying the critical path of a digital circuit. Due to the influence of the slope of a signal at a particul...
72
Voted
AHSWN
2008
14 years 9 months ago
2008
In this paper, we present a new efficient strategy for constructing a wireless tree network containing n nodes of diameter while satisfying the QoS requirements such as bandwidth...
TR
2008
14 years 9 months ago
2008
Shared Segment Protection (SSP), compared with Shared Path Protection (SPP), and Shared Link Protection (SLP), provides an optimal protection configuration due to the ability of ma...
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
In this paper, we highlight a fast, effective and practical statistical approach that deals with inter and intra-die variations in VLSI chips. Our methodology is applied to a numb...