301 search results - page 17 / 61 » On bounding the delay of a critical path |
FPGA
2005
ACM
15 years 5 months ago
2005
ACM
Logic duplication is an effective method for improving circuit performance. In this paper we present an algorithm named SPD that performs simultaneous placement and duplication to...
VLSID
2005
IEEE
16 years 6 days ago
2005
IEEE
: The direct result of shrinking devices is not only higher densities but also increased switching activity and thus higher device temperatures. The variation in temperature over t...
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ICCAD
2008
IEEE
15 years 8 months ago
2008
IEEE
Abstract— Process variations make at-speed testing significantly more difficult. They cause subtle delay changes that are distributed rather than the localized nature of a trad...
SIGCOMM
2000
ACM
15 years 4 months ago
2000
ACM
This paper examines the latency in Internet path failure, failover and repair due to the convergence properties of interdomain routing. Unlike switches in the public telephony net...
ICCAD
2004
IEEE
15 years 8 months ago
2004
IEEE
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...