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» On bounding the delay of a critical path
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CAL
2007
14 years 12 months ago
Microarchitectures for Managing Chip Revenues under Process Variations
—As transistor feature sizes continue to shrink into the sub-90nm range and beyond, the effects of process variations on critical path delay and chip yields have amplified. A com...
Abhishek Das, Serkan Ozdemir, Gokhan Memik, Joseph...
JCM
2006
89views more  JCM 2006»
14 years 11 months ago
A Premium Traffic Management in DiffServ Through End-to-End Delay Budget Partitioning
Our novel Call Admission Control (CAC) scheme [1], [2] determines the number of Expedited Forwarding (EF) (Premium) flows accepted, based on e2e available bandwidth measurement. Ho...
Hamada Alshaer, Eric Horlait
GLOBECOM
2008
IEEE
15 years 6 months ago
Time Dependent Message Spraying for Routing in Intermittently Connected Networks
—Intermittently connected mobile networks, also called Delay Tolerant Networks (DTNs), are wireless networks in which at any given time instance, the probability of having a comp...
Eyuphan Bulut, Zijian Wang, Boleslaw K. Szymanski
DAC
1995
ACM
15 years 3 months ago
Multi-way Partitioning for Minimum Delay for Look-Up Table Based FPGAs
In this paper we present a set cover based approach (SCP) to multi-way partitioning for minimum delay for Look-Up Table based FPGAs. SCP minimizes the number of chip-crossings on ...
Prashant Sawkar, Donald E. Thomas
ALGOSENSORS
2009
Springer
15 years 3 months ago
Routing on Delay Tolerant Sensor Networks
Abstract. Delay (or disruption) tolerant sensor networks may be modeled as Markovian evolving graphs [1]. We present experimental evidence showing that considering multiple (possib...
Michael Keane, Evangelos Kranakis, Danny Krizanc, ...