301 search results - page 27 / 61 » On bounding the delay of a critical path |
TVLSI
2008
14 years 11 months ago
2008
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
CIC
2004
15 years 1 months ago
2004
As a key issue in multicast routing with quality of service (QoS) support, constrained minimum Steiner tree (CMST) problem has been a research focus for more than a decade, and ten...
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DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
The clock latency scheduling problem is usually solved on the sequential graph, also called register-to-register graph. In practice, the the extraction of the sequential graph for...
CSREAESA
2004
15 years 1 months ago
2004
Adders are some of the most critical data path circuits requiring considerable design effort in order to "squeeze" out as much performance gain as possible. Many adder d...
ASPLOS
2006
ACM
15 years 5 months ago
2006
ACM
Growing on-chip wire delays are motivating architectural features that expose on-chip communication to the compiler. EDGE architectures are one example of communication-exposed mi...