301 search results - page 46 / 61 » On bounding the delay of a critical path |
115
click to vote
GLVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
- The Multi-Threshold CMOS (MTCMOS) technology has become a popular technique for standby power reduction. This technology utilizes high-Vth sleep transistors to reduce subthreshol...
ISCAS
2007
IEEE
15 years 6 months ago
2007
IEEE
— Fast addition and multiplication are of paramount importance in many arithmetic circuits and processors. The use of redundant number system for efficient implementation of thes...
DATE
2006
IEEE
15 years 5 months ago
2006
IEEE
Conventional high-level synthesis uses the worst case delay to relate all inputs to all outputs of an operation. This is a very conservative approximation of reality, especially i...
ASAP
2005
IEEE
15 years 5 months ago
2005
IEEE
With continued reductions in feature size, additional functionality may be added to future microprocessors to boost the performance of important application domains. Due to growth...
97
Voted
ASPDAC
2005
ACM
15 years 5 months ago
2005
ACM
: In ultra-deep submicron VLSI circuits, clock network is a major source of power consumption and power supply noise. Therefore, it is very important to minimize clock network size...