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» On combinations of CMA equalizers
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ITC
2003
IEEE
136views Hardware» more  ITC 2003»
15 years 3 months ago
A BIST Solution for The Test of I/O Speed
A delay-locked loop (DLL) based built-in self test (BIST) circuit has been designed with a 0.18 µ m TSMC process (CM018) to test chip I/O speeds, specifically, the setup and hold...
Cheng Jia, Linda S. Milor
RTCSA
2000
IEEE
15 years 2 months ago
Fixed-priority preemptive multiprocessor scheduling: to partition or not to partition
Traditional multiprocessor real-time scheduling partitions a task set and applies uniprocessor scheduling on each processor. By allowing a task to resume on another processor than...
Björn Andersson, Jan Jonsson
BIRTHDAY
1997
Springer
15 years 1 months ago
Expressive Power of Unary Counters
We compare the expressive power on finite models of two extensions of first order logic L with equality. L(Ct) is formed by adding an operator count{x : ϕ}, which builds a term ...
Michael Benedikt, H. Jerome Keisler
LOPSTR
1997
Springer
15 years 1 months ago
Implicit Program Synthesis by a Reversible Metainterpreter
Synthesis of logic programs is considered as a special instance of logic programming. We describe experience made within a logical metaprogramming environment whose central compone...
Henning Christiansen
VLDB
1992
ACM
173views Database» more  VLDB 1992»
15 years 1 months ago
An Extended Relational Database Model for Uncertain and Imprecise Information
We propose an extended relational database model which can model both uncertainty and imprecision in data. This model is basedon Dempster-Shafertheory which has become popular in ...
Suk Kyoon Lee