Sciweavers

759 search results - page 17 / 152
» On formal models for social verification
Sort
View
ENTCS
2008
88views more  ENTCS 2008»
14 years 9 months ago
Formal Modelling of Salience and Cognitive Load
Well-designed interfaces use procedural and sensory cues to increase the salience of appropriate actions and intentions. However, empirical studies suggest that cognitive load can...
Rimvydas Ruksenas, Jonathan Back, Paul Curzon, Ann...
CADE
2008
Springer
15 years 10 months ago
Model Stack for the Pervasive Verification of a Microkernel-based Operating System
Abstract. Operating-system verification gains increasing research interest. The complexity of such systems is, however, challenging and many endeavors are limited in some respect: ...
Jan Dörrenbächer, Matthias Daum, Sebasti...
FMCAD
2000
Springer
15 years 1 months ago
A Methodology for Large-Scale Hardware Verification
Abstract. We present a formal verification methodology for datapathdominated hardware. This provides a systematic but flexible framework within which to organize the activities und...
Mark Aagaard, Robert B. Jones, Thomas F. Melham, J...
FDL
2004
IEEE
15 years 1 months ago
A Formal Verification Approach for IP-based Designs
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
Daniel Karlsson, Petru Eles, Zebo Peng
CHARME
2001
Springer
92views Hardware» more  CHARME 2001»
15 years 1 months ago
Induction-Oriented Formal Verification in Symmetric Interconnection Networks
The framework of this paper is the formal specification and proof of applications distributed on symmetric interconnection networks, e.g. the torus or the hypercube. The algorithms...
Eric Gascard, Laurence Pierre