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» On formal models for social verification
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FMCAD
2008
Springer
14 years 11 months ago
Scaling Up the Formal Verification of Lustre Programs with SMT-Based Techniques
We present a general approach for verifying safety properties of Lustre programs automatically. Key aspects of the approach are the choice of an expressive first-order logic in wh...
George Hagen, Cesare Tinelli
JACM
2002
163views more  JACM 2002»
14 years 9 months ago
Formal verification of standards for distance vector routing protocols
We show how to use an interactive theorem prover, HOL, together with a model checker, SPIN, to prove key properties of distance vector routing protocols. We do three case studies: ...
Karthikeyan Bhargavan, Davor Obradovic, Carl A. Gu...
FORMATS
2007
Springer
15 years 1 months ago
Combining Formal Verification with Observed System Execution Behavior to Tune System Parameters
Resource limited DRE (Distributed Real-time Embedded) systems can benefit greatly from dynamic adaptation of system parameters. We propose a novel approach that employs iterative t...
Minyoung Kim, Mark-Oliver Stehr, Carolyn L. Talcot...
FM
2009
Springer
127views Formal Methods» more  FM 2009»
15 years 4 months ago
Automated Property Verification for Large Scale B Models
Michael Leuschel, Jérôme Falampin, Fa...
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
15 years 6 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz