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» On formal models for social verification
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CSFW
2010
IEEE
15 years 1 months ago
Formal Verification of Privacy for RFID Systems
RFID tags are being widely employed in a variety of applications, ranging from barcode replacement to electronic passports. Their extensive use, however, in combination with their ...
Mayla Brusò, Konstantinos Chatzikokolakis, ...
CAV
2007
Springer
227views Hardware» more  CAV 2007»
15 years 1 months ago
The TASM Toolset: Specification, Simulation, and Formal Verification of Real-Time Systems
Abstract. In this paper, we describe the features of the Timed Abstract State Machine toolset. The toolset implements the features of the Timed Abstract State Machine (TASM) langua...
Martin Ouimet, Kristina Lundqvist
ISORC
2000
IEEE
15 years 1 months ago
Verification of UML-Based Real-Time System Designs by Means of cTLA
The Unified Modeling Language UML is well-suited for the design of real-time systems. In particular, the design of dynamic system behaviors is supported by interaction diagrams an...
Günter Graw, Peter Herrmann, Heiko Krumm
ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
14 years 7 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...
88
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CONCUR
2006
Springer
15 years 1 months ago
Sanity Checks in Formal Verification
One of the advantages of temporal-logic model-checking tools is their ability to accompany a negative answer to the correctness query by a counterexample to the satisfaction of the...
Orna Kupferman