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» On formal models for social verification
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DFG
2004
Springer
15 years 1 months ago
Modeling and Formal Verification of Production Automation Systems
This paper presents the real-time model checker RAVEN and related theoretical background. RAVEN augments the efficiency of traditional symbolic model checking with possibilities to...
Jürgen Ruf, Roland J. Weiss, Thomas Kropf, Wo...
GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
15 years 1 months ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
83
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ESORICS
2000
Springer
15 years 1 months ago
Verification of a Formal Security Model for Multiapplicative Smart Cards
Abstract. We present a generic formal security model for operating systems of multiapplicative smart cards. The model formalizes the main security aspects of secrecy, integrity, se...
Gerhard Schellhorn, Wolfgang Reif, Axel Schairer, ...
RTS
2008
131views more  RTS 2008»
14 years 9 months ago
Formal verification of multitasking applications based on timed automata model
The aim of this paper is to show, how a multitasking application running under a real-time operating system compliant with an OSEK/VDX standard can be modeled by timed automata. Th...
Libor Waszniowski, Zdenek Hanzálek
ICESS
2005
Springer
15 years 3 months ago
Formalization of fFSM Model and Its Verification
PeaCE(Ptolemy extension as a Codesign Environment) was developed for the hardware and software codesign framework which allows us to express both data flow and control flow. The fF...
Sachoun Park, Gihwon Kwon, Soonhoi Ha