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SWAT
2004
Springer
123views Algorithms» more  SWAT 2004»
15 years 7 months ago
A Simple Linear-Time Modular Decomposition Algorithm for Graphs, Using Order Extension
The first polynomial time algorithm (O(n4 )) for modular decomposition appeared in 1972 [8] and since then there have been incremental improvements, eventually resulting in linear...
Michel Habib, Fabien de Montgolfier, Christophe Pa...
FMCAD
2009
Springer
15 years 8 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris
ICCAD
1994
IEEE
131views Hardware» more  ICCAD 1994»
15 years 6 months ago
Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
Hannah Honghua Yang, D. F. Wong
CCE
2004
15 years 1 months ago
Improving convergence of the stochastic decomposition algorithm by using an efficient sampling technique
This work focuses on the basic stochastic decomposition (SD) algorithm of Higle and Sen [J.L. Higle, S. Sen, Stochastic Decomposition, Kluwer Academic Publishers, 1996] for two-st...
José María Ponce-Ortega, Vicente Ric...
IPPS
2003
IEEE
15 years 7 months ago
Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing
Partial reconfiguration allows for mapping and executing several tasks on an FPGA during runtime. Multitasking on FPGAs raises a number of questions on the management of the reco...
Herbert Walder, Christoph Steiger, Marco Platzner