112 search results - page 4 / 23 » On improving optimization effectiveness in interconnect-driv... |
FCCM
2002
IEEE
15 years 2 months ago
2002
IEEE
C-slow retiming (changing a design to support multiple instances of a computation) and datapath-aware placement have long been advocated by members of the FPGA synthesis community...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
High level synthesis transformations play a major part in shaping the properties of the final circuit. However, most optimizations are performed without much knowledge of the fina...
SIGMOD
2008
ACM
14 years 9 months ago
2008
ACM
Automated physical design tuning for database systems has recently become an active area of research and development. Existing tuning tools explore the space of feasible solutions...
IJWMC
2010
14 years 6 months ago
2010
Coverage, fault tolerance and power consumption constraints make optimal placement of mobile sensors or other mobile agents a hard problem. We have developed a model for describin...
ASPDAC
2008
ACM
14 years 11 months ago
2008
ACM
Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...