88 search results - page 7 / 18 » On load latency in low-power caches |
PARA
2004
Springer
15 years 2 months ago
2004
Springer
Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefet...
ISCA
2008
IEEE
15 years 3 months ago
2008
IEEE
Multicore processors have emerged as a powerful platform on which to efficiently exploit thread-level parallelism (TLP). However, due to Amdahl’s Law, such designs will be incr...
MICRO
2002
IEEE
15 years 2 months ago
2002
IEEE
Data prefetching effectively reduces the negative effects of long load latencies on the performance of modern processors. Hardware prefetchers employ hardware structures to predic...
MICRO
2005
IEEE
15 years 3 months ago
2005
IEEE
Conventional processors use a fully-associative store queue (SQ) to implement store-load forwarding. Associative search latency does not scale well to capacities and bandwidths re...
IISWC
2006
IEEE
15 years 3 months ago
2006
IEEE
The load instructions of some of the bioinformatics applications in the BioPerf suite possess interesting characteristics: only a few static loads cover almost the entire dynamic ...