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» On load latency in low-power caches
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PLDI
1995
ACM
15 years 29 days ago
Improving Balanced Scheduling with Compiler Optimizations that Increase Instruction-Level Parallelism
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
Jack L. Lo, Susan J. Eggers
EUROPAR
2001
Springer
15 years 1 months ago
Load Redundancy Elimination on Executable Code
Optimizations performed at link time or directly applied to nal program executables have received increased attention in recent years. This paper discuss the discovery and elimina...
Manel Fernández, Roger Espasa, Saumya K. De...
HPCA
2002
IEEE
15 years 9 months ago
Quantifying Load Stream Behavior
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
Suleyman Sair, Timothy Sherwood, Brad Calder
CGO
2006
IEEE
15 years 3 months ago
A Self-Repairing Prefetcher in an Event-Driven Dynamic Optimization Framework
Software prefetching has been demonstrated as a powerful technique to tolerate long load latencies. However, to be effective, prefetching must target the most critical (frequently...
Weifeng Zhang, Brad Calder, Dean M. Tullsen
CN
1998
81views more  CN 1998»
14 years 9 months ago
Improving the WWW: Caching or Multicast?
We consider two schemes for the distributionof Web documents. In the first scheme the sender repeatedly transmits the Web document into a multicast address, and receivers asynchr...
Pablo Rodriguez, Keith W. Ross, Ernst Biersack