305 search results - page 27 / 61 » On modeling top-down VLSI design |
151
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SBCCI
2003
ACM
15 years 7 months ago
2003
ACM
The growing adoption of reconfigurable architectures opens new implementation alternatives and creates new design challenges. In the case of dynamically reconfigurable architectur...
DAC
2005
ACM
16 years 2 months ago
2005
ACM
This paper presents a unifying framework for the modeling of asynchronous pipeline circuits. A pipeline protocol is captured in a graph-based model which defines the partial order...
ICCAD
2008
IEEE
15 years 10 months ago
2008
IEEE
—To overcome the energy-efficiency limitations imposed by finite sub-threshold slope in CMOS transistors, this paper explores the design of integrated circuits based on nanoelect...
113
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SBCCI
2006
ACM
15 years 8 months ago
2006
ACM
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
124
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VLSID
2001
IEEE
16 years 2 months ago
2001
IEEE
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...