305 search results - page 3 / 61 » On modeling top-down VLSI design |
98
Voted
GLVLSI
1999
IEEE
15 years 6 months ago
1999
IEEE
This paper proposes a new fault coverage estimation model which can be used in the early stage of VLSI design. The fault coverage model is an exponentially decaying function with ...
143
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DAC
1997
ACM
15 years 6 months ago
1997
ACM
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
101
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ACSC
2005
IEEE
15 years 7 months ago
2005
IEEE
Curriculum based on internetworking devices is primarily based on the Command Line Interface (CLI) and case studies. However a single CLI command may produce output that is not on...
127
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ICCAD
2002
IEEE
15 years 10 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
101
Voted
VLSID
1998
IEEE
15 years 6 months ago
1998
IEEE
Emerging "systems-on-a-chip" will require a design environment that allows distributed access to libraries, models and design tools. In this paper we present a framework...