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DATE
1998
IEEE
91views Hardware» more  DATE 1998»
15 years 4 months ago
Interconnect Tuning Strategies for High-Performance Ics
Interconnect tuning is an increasingly critical degree of freedom in the physical design of high-performance VLSI systems. By interconnect tuning, we refer to the selection of lin...
Andrew B. Kahng, Sudhakar Muddu, Egino Sarto, Rahu...
DATE
1998
IEEE
153views Hardware» more  DATE 1998»
15 years 4 months ago
An Energy-Conscious Exploration Methodology for Reconfigurable DSPs
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
Jan M. Rabaey, Marlene Wan
ASPLOS
1989
ACM
15 years 4 months ago
Architecture and Compiler Tradeoffs for a Long Instruction Word Microprocessor
A very long instruction word (VLIW) processorexploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compil...
Robert Cohn, Thomas R. Gross, Monica S. Lam, P. S....
HIPEAC
2007
Springer
15 years 3 months ago
Efficient Program Power Behavior Characterization
Fine-grained program power behavior is useful in both evaluating power optimizations and observing power optimization opportunities. Detailed power simulation is time consuming and...
Chunling Hu, Daniel A. Jiménez, Ulrich Krem...
BROADNETS
2004
IEEE
15 years 3 months ago
The Effects of the Sub-Carrier Grouping on Multi-Carrier Channel Aware Scheduling
Channel-aware scheduling and link adaptation (LA) methods are widely considered to be crucial for realizing high data rates in wireless networks. Multi-carrier systems that spread...
Fanchun Jin, Gokhan Sahin, Amrinder Arora, Hyeong-...
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