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» On predicting reliability of modules using code coverage
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ASYNC
2002
IEEE
115views Hardware» more  ASYNC 2002»
15 years 4 months ago
Point to Point GALS Interconnect
Reliable, low-latency channel communication between independent clock domains may be achieved using a combination of clock pausing techniques, self-calibrating delay lines and an ...
George S. Taylor, Simon W. Moore, Robert D. Mullin...
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ACSAC
2010
IEEE
14 years 8 months ago
Heap Taichi: exploiting memory allocation granularity in heap-spraying attacks
Heap spraying is an attack technique commonly used in hijacking browsers to download and execute malicious code. In this attack, attackers first fill a large portion of the victim...
Yu Ding, Tao Wei, Tielei Wang, Zhenkai Liang, Wei ...
SC
2009
ACM
15 years 4 months ago
A framework for core-level modeling and design of reconfigurable computing algorithms
Reconfigurable computing (RC) is rapidly becoming a vital technology for many applications, from high-performance computing to embedded systems. The inherent advantages of custom-...
Gongyu Wang, Greg Stitt, Herman Lam, Alan D. Georg...
MSR
2011
ACM
14 years 2 months ago
A simpler model of software readability
Software readability is a property that influences how easily a given piece of code can be read and understood. Since readability can affect maintainability, quality, etc., prog...
Daryl Posnett, Abram Hindle, Premkumar T. Devanbu
DATE
2010
IEEE
156views Hardware» more  DATE 2010»
15 years 4 months ago
3D-integration of silicon devices: A key technology for sophisticated products
—3D integration is a key solution to the predicted performance increase of future electronic systems. It offers extreme miniaturization and fabrication of More than Moore product...
Armin Klumpp, Peter Ramm, R. Wieland