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» On process-algebraic verification of asynchronous circuits

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ASYNC
1999
IEEE

110views Hardware» more ASYNC 1999»

Verification of Delayed-Reset Domino Circuits Using ATACS

15 years 3 months ago

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This paper discusses the application of the timing analysis tool ATACS to the high performance, self-resetting and delayed-reset domino circuits being designed at IBM's Austi...

Wendy Belluomini, Chris J. Myers, H. Peter Hofstee

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115

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ASYNC
2007
IEEE

161views Hardware» more ASYNC 2007»

Gate-level modelling and verification of asynchronous circuits using CSPM and FDR

15 years 5 months ago

Download conferences.computer.org

Mark B. Josephs

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PRDC
2002
IEEE

97views Applied Computing» more PRDC 2002»

Level Oriented Formal Model for Asynchronous Circuit Verification and its Efficient Analysis Method

15 years 4 months ago

Download www.async.ece.utah.edu

Tomoya Kitai, Yusuke Oguro, Tomohiro Yoneda, Eric ...

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CAV
1995
Springer

95views Hardware» more CAV 1995»

Trace Theoretic Verification of Asynchronous Circuits Using Unfoldings

15 years 3 months ago

Download www.cadence.com

Kenneth L. McMillan

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AC
2002
Springer

94views Software Engineering» more AC 2002»

Timed Verification of Asynchronous Circuits

14 years 11 months ago

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