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VLSID
2005
IEEE
98views VLSI» more  VLSID 2005»
14 years 6 months ago
False Path and Clock Scheduling Based Yield-Aware Gate Sizing
Timing margin (slack) needs to be carefully managed to ensure a satisfactory timing yield. We propose a new design flow that combines a false-path-aware gate sizing and a statisti...
Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Pin...
AUSAI
2005
Springer
13 years 11 months ago
Adaptive Utility-Based Scheduling in Resource-Constrained Systems
This paper addresses the problem of scheduling jobs in soft real-time systems, where the utility of completing each job decreases over time. We present a utility-based framework fo...
David Vengerov
MICRO
2009
IEEE
147views Hardware» more  MICRO 2009»
14 years 28 days ago
Complexity effective memory access scheduling for many-core accelerator architectures
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
George L. Yuan, Ali Bakhoda, Tor M. Aamodt
IROS
2007
IEEE
107views Robotics» more  IROS 2007»
14 years 17 days ago
Scheduling for humans in multirobot supervisory control
—This paper describes efficient utilization of human time by two means: prioritization of human tasks and maximizing multirobot team size. We propose an efficient scheduling algo...
Sandra Mau, John M. Dolan
ICCAD
2003
IEEE
325views Hardware» more  ICCAD 2003»
13 years 11 months ago
Hardware Scheduling for Dynamic Adaptability using External Profiling and Hardware Threading
While performance, area, and power constraints have been the driving force in designing current communication-enabled embedded systems, post-fabrication and run-time adaptability ...
Brian Swahn, Soha Hassoun