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DAC
2010
ACM
15 years 10 months ago
Cost-driven 3D integration with interconnect layers
The ever increasing die area of Chip Multiprocessors (CMPs) affects manufacturing yield, resulting in higher manufacture cost. Meanwhile, network-on-chip (NoC) has emerged as a p...
Xiaoxia Wu, Guangyu Sun, Xiangyu Dong, Reetuparna ...
SIAMSC
2008
140views more  SIAMSC 2008»
15 years 6 months ago
Compact Fourier Analysis for Designing Multigrid Methods
The convergence of Multigrid methods can be analyzed based on a Fourier analysis of the method or by proving certain inequalities that have to be fulfilled by the smoother and by t...
Thomas K. Huckle
156
Voted
TCS
2002
15 years 5 months ago
Process algebra for performance evaluation
This paper surveys the theoretical developments in the field of stochastic process algebras, process algebras where action occurrences may be subject to a delay that is determined...
Holger Hermanns, Ulrich Herzog, Joost-Pieter Katoe...
IJAMC
2010
134views more  IJAMC 2010»
15 years 4 months ago
HyperVerse: simulation and testbed reconciled
—When dealing with dynamic large-scale topologies such as those underlying peer-to-peer (P2P) distributed virtual environments (DVE), one inescapably reaches the point where eith...
Jean Botev, Markus Esch, Hermann Schloss, Ingo Sch...
LCTRTS
2010
Springer
15 years 4 months ago
Translating concurrent action oriented specifications to synchronous guarded actions
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
Jens Brandt, Klaus Schneider, Sandeep K. Shukla