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» On software design for stochastic processors
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CASES
2006
ACM
15 years 5 months ago
Cost-efficient soft error protection for embedded microprocessors
Device scaling trends dramatically increase the susceptibility of microprocessors to soft errors. Further, mounting demand for embedded microprocessors in a wide array of safety c...
Jason A. Blome, Shantanu Gupta, Shuguang Feng, Sco...
HASE
2007
IEEE
15 years 8 months ago
Scalable, Adaptive, Time-Bounded Node Failure Detection
This paper presents a scalable, adaptive and timebounded general approach to assure reliable, real-time Node-Failure Detection (NFD) for large-scale, high load networks comprised ...
Matthew Gillen, Kurt Rohloff, Prakash Manghwani, R...
CASES
2004
ACM
15 years 7 months ago
High-level power analysis for on-chip networks
As on-chip networks become prevalent in multiprocessor systemson-a-chip and multi-core processors, they will be an integral part of the design flow of such systems. With power in...
Noel Eisley, Li-Shiuan Peh
POPL
2006
ACM
16 years 2 months ago
Autolocker: synchronization inference for atomic sections
The movement to multi-core processors increases the need for simpler, more robust parallel programming models. Atomic sections have been widely recognized for their ease of use. T...
Bill McCloskey, Feng Zhou, David Gay, Eric A. Brew...
ICCD
2008
IEEE
142views Hardware» more  ICCD 2008»
15 years 11 months ago
Making register file resistant to power analysis attacks
— Power analysis attacks are a type of side-channel attacks that exploits the power consumption of computing devices to retrieve secret information. They are very effective in br...
Shuo Wang, Fan Zhang, Jianwei Dai, Lei Wang, Zhiji...