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» On test coverage of path delay faults
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ASPDAC
2008
ACM
78views Hardware» more  ASPDAC 2008»
14 years 11 months ago
Robust test generation for power supply noise induced path delay faults
Xiang Fu, Huawei Li, Yu Hu, Xiaowei Li
ITC
1996
IEEE
83views Hardware» more  ITC 1996»
15 years 1 months ago
Test Generation for Global Delay Faults
This paper describes test generation for delay faults caused by global process disturbances. The structural and spatial correlation between path delays is used to reduce the numbe...
G. M. Luong, D. M. H. Walker
VTS
2007
IEEE
95views Hardware» more  VTS 2007»
15 years 3 months ago
Delay Test Quality Evaluation Using Bounded Gate Delays
: Conventionally, path delay tests are derived in a delay-independent manner, which causes most faults to be robustly untestable. Many non-robust tests are found but, in practice, ...
Soumitra Bose, Vishwani D. Agrawal
78
Voted
TVLSI
2002
111views more  TVLSI 2002»
14 years 9 months ago
Circular BIST with state skipping
Circular built-in self-test (BIST) is a "test per clock" scheme that offers many advantages compared with conventional BIST approaches in terms of low area overhead, simp...
Nur A. Touba
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Warning: Launch off Shift Tests for Delay Faults May Contribute to Test Escapes
- Two methods to apply tests to detect delay faults in standard scan designs are used. One is called launch off capture and the other is called launch off shift. Launch off shift t...
Zhuo Zhang, Sudhakar M. Reddy, Irith Pomeranz