Sciweavers

418 search results - page 7 / 84
» On the Adders with Minimum Tests
Sort
View
ACL
2000
15 years 1 months ago
A Maximum Entropy/Minimum Divergence Translation Model
I describe two methods for incorporating information about the relative positions of bilingual word pairs into a Maximum Entropy/Minimum Divergence translation model. The better o...
George F. Foster
ISLPED
1999
ACM
86views Hardware» more  ISLPED 1999»
15 years 4 months ago
Power macro-models for DSP blocks with application to high-level synthesis
Abstract – In this paper, we propose a modeling approach for the average power consumption of macro-blocks that are typically used in digital signal processing (DSP) systems, suc...
Subodh Gupta, Farid N. Najm
CAI
2004
Springer
14 years 11 months ago
An Evolvable Combinational Unit for FPGAs
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...
Lukás Sekanina, Stepan Friedl
JIPS
2008
116views more  JIPS 2008»
14 years 11 months ago
An Empirical Study of Qualities of Association Rules from a Statistical View Point
: Minimum support and confidence have been used as criteria for generating association rules in all association rule mining algorithms. These criteria have their natural appeals, s...
Maryann Dorn, Wen-Chi Hou, Dunren Che, Zhewei Jian...
VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
16 years 2 days ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne