2607 search results - page 3 / 522 » On the Architecture of System Verification Environments |
DAC
1994
ACM
13 years 10 months ago
1994
ACM
Functional and timing verification are currently the bottlenecks in many design efforts. Simulation and emulation are extensively used for verification. Formal verification is now...
DAC
2006
ACM
14 years 6 days ago
2006
ACM
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
ENTCS
2006
13 years 6 months ago
2006
We present a new approach to runtime verification that utilizes classical statistical techniques such as Monte Carlo simulation, hypothesis testing, and confidence interval estima...
IJCAI
1993
13 years 7 months ago
1993
agent-oriented system. We show the complexity to be linear time for one of these logics and polynomial time for another, thus providing encouraging results with respect to the prac...
CF
2004
ACM
13 years 11 months ago
2004
ACM
New applications and standards are first conceived only for functional correctness and without concerns for the target architecture. The next challenge is to map them onto an arch...