This paper analyses alternatives for the parallelization of the Simulated Annealing algorithm when applied to the placement of modules in a VLSI circuit considering the use of PVM...
Transport triggered architecture (TTA) has been shown to provide an efficient way to design application specific instruction set processors. However, the interconnection network of...
This paper addresses the problem of configuring wireless sensor networks (WSNs). Specifically, we seek answers to the following questions: how many sensors should be deployed, wha...
Sleep transistors in industrial power-gating designs are custom designed with an optimal size. Consequently, sleep transistor P/G network optimization becomes a problem of finding ...
In a recent paper, Savas, Batta and Nagi [14] consider the optimal placement of a finite-sized facility in the presence of arbitrarily-shaped barriers under rectilinear travel. T...