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SIGMETRICS
2003
ACM
147views Hardware» more  SIGMETRICS 2003»
15 years 3 months ago
Effect of node size on the performance of cache-conscious B+-trees
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...
Richard A. Hankins, Jignesh M. Patel
FLAIRS
2008
15 years 1 days ago
Gender Differences across Correlated Corpora: Preliminary Results
Does genre affect the way we communicate? We are especially interested in how computer mediation affects the style and content of communication. In an effort to find features rela...
Roberta Evans Sabin, Kerri A. Goodwin, Jade Goldst...
GECCO
2009
Springer
170views Optimization» more  GECCO 2009»
15 years 2 months ago
Benchmarking a BI-population CMA-ES on the BBOB-2009 noisy testbed
We benchmark the BI-population CMA-ES on the BBOB2009 noisy functions testbed. BI-population refers to a multistart strategy with equal budgets for two interlaced restart strategi...
Nikolaus Hansen
DATE
2009
IEEE
118views Hardware» more  DATE 2009»
15 years 4 months ago
Gate sizing for large cell-based designs
—Today, many chips are designed with predefined discrete cell libraries. In this paper we present a new fast gate sizing algorithm that works natively with discrete cell choices...
Stephan Held
DATE
2007
IEEE
96views Hardware» more  DATE 2007»
15 years 4 months ago
Self-heating-aware optimal wire sizing under Elmore delay model
Global interconnect temperature keeps rising in the current and future technologies due to self-heating and the adiabatic property of top metal layers. The thermal e ects impact a...
Min Ni, Seda Ogrenci Memik