Sciweavers

10718 search results - page 102 / 2144
» On the Circuit Implementation Problem
Sort
View
123
Voted
FPL
2006
Springer
158views Hardware» more  FPL 2006»
15 years 7 months ago
Actual-Delay Circuits on FPGA: Trading-Off Luts for Speed
FPGA devices exhibit manufacturing variability. Device ratings and Timing margins are typically used in order to cope with inter-device and intra-device variability respectively. ...
Evangelia Kassapaki, Pavlos M. Mattheakis, Christo...
132
Voted
ICCAD
2009
IEEE
119views Hardware» more  ICCAD 2009»
15 years 1 months ago
Iterative layering: Optimizing arithmetic circuits by structuring the information flow
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
Ajay K. Verma, Philip Brisk, Paolo Ienne
125
Voted
CEC
2009
IEEE
15 years 10 months ago
Task decomposition and evolvability in intrinsic evolvable hardware
— Many researchers have encountered the problem that the evolution of electronic circuits becomes exponentially more difficult when problems with an increasing number of outputs...
Tüze Kuyucu, Martin Trefzer, Julian Francis M...
135
Voted
DATE
2006
IEEE
151views Hardware» more  DATE 2006»
15 years 9 months ago
Designing MRF based error correcting circuits for memory elements
As devices are scaled to the nanoscale regime, it is clear that future nanodevices will be plagued by higher soft error rates and reduced noise margins. Traditional implementation...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
127
Voted
NIPS
1996
15 years 4 months ago
Analog VLSI Circuits for Attention-Based, Visual Tracking
A one-dimensional, visual tracking chip has been implemented using neuromorphic,analog VLSI techniques to modelselective visual attention in the control of saccadic and smooth pur...
Timothy K. Horiuchi, Tonia G. Morris, Christof Koc...