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» On the Circuit Implementation Problem
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123
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ASPDAC
2004
ACM
144views Hardware» more  ASPDAC 2004»
15 years 7 months ago
Verification of timed circuits with symbolic delays
When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...
Robert Clarisó, Jordi Cortadella
111
Voted
IWANN
1995
Springer
15 years 7 months ago
Test Pattern Generation for Analog Circuits Using Neural Networks and Evolutive Algorithms
This paper presents a comparative analysis of neural networks, simulated annealing, and genetic algorithms in the determination of input patterns for testing analog circuits. The ...
José Luis Bernier, Juan J. Merelo Guerv&oac...
121
Voted
CORR
2010
Springer
119views Education» more  CORR 2010»
15 years 2 months ago
Computational Complexity of Avalanches in the Kadanoff two-dimensional Sandpile Model
In this paper we prove that the avalanche problem for the Kadanoff sandpile model (KSPM) is P-complete for two-dimensions. Our proof is based on a reduction from the monotone circ...
Eric Goles Chacc, Bruno Martin
94
Voted
DATE
2008
IEEE
100views Hardware» more  DATE 2008»
15 years 10 months ago
Towards Trojan-Free Trusted ICs: Problem Analysis and Detection Scheme
There have been serious concerns recently about the security of microchips from hardware trojan horse insertion during manufacturing. This issue has been raised recently due to ou...
Francis G. Wolff, Christos A. Papachristou, Swarup...
141
Voted
ASPDAC
1998
ACM
119views Hardware» more  ASPDAC 1998»
15 years 7 months ago
Integer Programming Models for Optimization Problems in Test Generation
— Test Pattern Generation for combinational circuits entails the identification of primary input assignments for detecting each fault in a set of target faults. An extension to ...
João P. Marques Silva