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» On the Circuit Implementation Problem
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128
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VLSID
2003
IEEE
183views VLSI» more  VLSID 2003»
16 years 4 months ago
Interconnect Delay Minimization Using a Novel Pre-Mid-Post Buffer Strategy
We consider the problem of minimizing the delay in transporting a signal across a distance in a VLSI circuit.The problem can be restated as a combined buffer insertion, buffer siz...
Vani Prasad, Madhav P. Desai
ICCAD
2008
IEEE
162views Hardware» more  ICCAD 2008»
16 years 15 days ago
MAPS: multi-algorithm parallel circuit simulation
— The emergence of multi-core and many-core processors has introduced new opportunities and challenges to EDA research and development. While the availability of increasing paral...
Xiaoji Ye, Wei Dong, Peng Li, Sani R. Nassif
130
Voted
GLVLSI
2005
IEEE
132views VLSI» more  GLVLSI 2005»
15 years 9 months ago
Interconnect capacitance extraction for system LCD circuits
This paper discusses interconnect capacitance extraction for system LCD circuits, where coupling capacitance is much significant since a ground plane locates far away unlike LSI ...
Yoshihiro Uchida, Sadahiro Tani, Masanori Hashimot...
129
Voted
CJTCS
1999
133views more  CJTCS 1999»
15 years 3 months ago
The Permanent Requires Large Uniform Threshold Circuits
We show that thepermanent cannot be computed by uniform constantdepth threshold circuits of size Tn, for any function T such that for all k, Tk n = o2n. More generally, we show th...
Eric Allender
124
Voted
ASPDAC
2007
ACM
101views Hardware» more  ASPDAC 2007»
15 years 7 months ago
Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic
-- Analog circuit sizing under process/parameter variations is formulated as a mini-max geometric programming problem. To tackle such problem, we present a new method that combines...
Xuexin Liu, Wai-Shing Luk, Yu Song, Pushan Tang, X...