10718 search results - page 133 / 2144 » On the Circuit Implementation Problem |
125
Voted
ICCAD
2006
IEEE
16 years 18 days ago
2006
IEEE
Abstract— Chip-package thermal analysis is necessary for the design and synthesis of reliable, high-performance, low-power, compact integrated circuits (ICs). Many methods of IC ...
121
Voted
ICCAD
1997
IEEE
15 years 8 months ago
1997
IEEE
† This paper describes a novel methodology to automate the design of the interconnect distribution for multistage clock circuits. We introduce two key ideas. First, a hierarchica...
107
Voted
IWANN
2005
Springer
15 years 9 months ago
2005
Springer
This presentation has two goals: (i) to review the recently suggested concept of bio-inspired CrossNet architectures for future hybrid CMOL VLSI circuits and (ii) to present new re...
114
Voted
TC
1998
15 years 3 months ago
1998
—Many built-in self-testing (BIST) schemes compress the test responses from a k-output circuit to q signature streams, where q << k, a process termed space compaction. The ...
114
Voted
ISQED
2003
IEEE
15 years 9 months ago
2003
IEEE
This paper proposes a new clocking strategy for dynamic circuit. It provides faster performance and smaller area than conventional clocking scheme. The proposed clocking scheme fo...