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» On the Circuit Implementation Problem
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AIPS
1994
15 years 5 months ago
A Planner with Quality Goal and Its Speed-up Learning for Optimization Problem
Aimsof traditional planners had beenlimited to finding a sequenceof operators rather than finding an optimal or neax-optimalfinal state. Consequent]y, the performanceimprovementsy...
Masahiko Iwamoto
IJAIT
2010
167views more  IJAIT 2010»
15 years 2 months ago
Bee Colony Optimization with Local Search for Traveling Salesman Problem
Many real world industrial applications involve finding a Hamiltonian path with minimum cost. Some instances that belong to this category are transportation routing problem, scan c...
Li-Pei Wong, Malcolm Yoke-Hean Low, Chin Soon Chon...
116
Voted
CHES
2005
Springer
82views Cryptology» more  CHES 2005»
15 years 9 months ago
Masking at Gate Level in the Presence of Glitches
Abstract. It has recently been shown that logic circuits in the implementation of cryptographic algorithms, although protected by “secure” random masking schemes, leak side-cha...
Wieland Fischer, Berndt M. Gammel
139
Voted
CORR
2010
Springer
158views Education» more  CORR 2010»
14 years 10 months ago
Efficient Approaches for Designing Fault Tolerant Reversible Carry Look-Ahead and Carry-Skip Adders
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its correspon...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
123
Voted
TCAD
2002
110views more  TCAD 2002»
15 years 3 months ago
A constructive genetic algorithm for gate matrix layout problems
This paper describes an application of a Constructive Genetic Algorithm (CGA) to the Gate Matrix Layout Problem (GMLP). The GMLP happens in very large scale integration (VLSI) desi...
Alexandre César Muniz de Oliveira, Luiz Ant...