10718 search results - page 148 / 2144 » On the Circuit Implementation Problem |
140
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ECCC
2010
15 years 3 months ago
2010
We study a variant of the classical circuit-lower-bound problems: proving lower bounds for sampling distributions given random bits. We prove a lower bound of 1 - 1/n(1) on the st...
136
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TCAD
2002
15 years 3 months ago
2002
Abstract--This paper investigates the application of simultaneous retiming and clock scheduling for optimizing synchronous circuits under setup and hold constraints. Two optimizati...
104
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VLSID
2002
IEEE
16 years 4 months ago
2002
IEEE
Interconnect with an insufficient width may be subject to electromigration and eventually cause the failure of the circuit at any time during its lifetime. This problem has gotten...
138
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CANS
2009
Springer
15 years 10 months ago
2009
Springer
Abstract. We consider generic Garbled Circuit (GC)-based techniques for Secure Function Evaluation (SFE) in the semi-honest model. We describe efficient GC constructions for additi...
130
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CHES
2004
Springer
15 years 9 months ago
2004
Springer
Dual-rail encoding, return-to-spacer protocol and hazard-free logic can be used to resist differential power analysis attacks by making the power consumption independent of process...