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» On the Circuit Implementation Problem
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AAAI
1994
15 years 5 months ago
Structured Circuit Semantics for Reactive Plan Execution Systems
A variety of reactive plan execution systems have been developed in recent years, each attempting to solve the problem of taking reasonable courses of action fast enough in a dyna...
Jaeho Lee, Edmund H. Durfee
ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
16 years 22 days ago
Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning
This paper proposes a new formalism for layout-driven optimization of datapaths. It is based on preserving an arithmetic bit level representation of the arithmetic circuit portion...
Ingmar Neumann, Dominik Stoffel, Kolja Sulimma, Mi...
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
15 years 10 months ago
MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues
—Nonvolatile logic-in-memory architecture, where nonvolatile memory elements are distributed over a logic-circuit plane, is expected to realize both ultra-low-power and reduced i...
Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Katsuy...
ATS
2005
IEEE
164views Hardware» more  ATS 2005»
15 years 5 months ago
A Family of Logical Fault Models for Reversible Circuits
Reversibility is of interest in achieving extremely low power dissipation; it is also an inherent design requirement of quantum computation. Logical fault models for conventional ...
Ilia Polian, Thomas Fiehn, Bernd Becker, John P. H...
STOC
2005
ACM
132views Algorithms» more  STOC 2005»
16 years 4 months ago
Locally decodable codes with 2 queries and polynomial identity testing for depth 3 circuits
In this work we study two, seemingly unrelated, notions. Locally Decodable Codes (LDCs) are codes that allow the recovery of each message bit from a constant number of entries of ...
Zeev Dvir, Amir Shpilka