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PATMOS
2005
Springer
15 years 9 months ago
Design of Variable Input Delay Gates for Low Dynamic Power Circuits
The time taken for a CMOS logic gate output to change after one or more inputs have changed is called the output delay of the gate. A conventional multi-input CMOS gate is designed...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
DNA
2004
Springer
15 years 9 months ago
DNA Hybridization Catalysts and Catalyst Circuits
Practically all of life’s molecular processes, from chemical synthesis to replication, involve enzymes that carry out their functions through the catalysis of metastable fuels in...
Georg Seelig, Bernard Yurke, Erik Winfree
DAGM
2003
Springer
15 years 9 months ago
Real-Time Inspection System for Printed Circuit Boards
In this paper, we present a real-time PCB inspection system which can detect defects including the breaks in the wires and short circuit. The proposed inspection algorithm is based...
Kang-Sun Choi, Jae-Young Pyun, Nam-Hyeong Kim, Bye...
DAC
2005
ACM
15 years 5 months ago
Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...
Feng Gao, John P. Hayes
JOCN
2010
68views more  JOCN 2010»
15 years 2 months ago
Shared Neural Circuits for Mentalizing about the Self and Others
■ Although many examples exist for shared neural representations of self and other, it is unknown how such shared representations interact with the rest of the brain. Furthermor...
Michael V. Lombardo, Bhismadev Chakrabarti, Edward...