Sciweavers

10718 search results - page 165 / 2144
» On the Circuit Implementation Problem
Sort
View
FORTE
1998
15 years 5 months ago
Hardware synthesis from protocol specifications in LOTOS
: In this paper, we propose a technique for hardware implementation of protocol specifications in LOTOS. For the purpose, we define a new model called synchronous EFSMs consisting ...
Keiichi Yasumoto, Akira Kitajima, Teruo Higashino,...
CAI
2004
Springer
15 years 3 months ago
An Evolvable Combinational Unit for FPGAs
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...
Lukás Sekanina, Stepan Friedl
109
Voted
ICCAD
2006
IEEE
107views Hardware» more  ICCAD 2006»
16 years 25 days ago
Current path analysis for electrostatic discharge protection
The electrostatic discharge (ESD) problem has become a challenging reliability issue in nanometer circuit design. High voltages resulted from ESD might cause high current densitie...
Hung-Yi Liu, Chung-Wei Lin, Szu-Jui Chou, Wei-Ting...
ISQED
2007
IEEE
152views Hardware» more  ISQED 2007»
15 years 10 months ago
Variation Aware Timing Based Placement Using Fuzzy Programming
In nanometer regime, the effects of variations are having an increasing impact on the delay and power characteristics of devices as well as the yield of the circuit. Statistical t...
Venkataraman Mahalingam, N. Ranganathan
138
Voted
ICCD
2008
IEEE
139views Hardware» more  ICCD 2008»
16 years 27 days ago
Probabilistic error propagation in logic circuits using the Boolean difference calculus
- A gate level probabilistic error propagation model is presented which takes as input the Boolean function of the gate, the signal and error probabilities of the gate inputs, and ...
Nasir Mohyuddin, Ehsan Pakbaznia, Massoud Pedram