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» On the Circuit Implementation Problem
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145
Voted
ICCAD
1997
IEEE
147views Hardware» more  ICCAD 1997»
15 years 8 months ago
Built-in test generation for synchronous sequential circuits
We consider the problem of built-in test generation for synchronous sequential circuits. The proposed scheme leaves the circuit flip-flops unmodified, and thus allows at-speed ...
Irith Pomeranz, Sudhakar M. Reddy
DSD
2009
IEEE
92views Hardware» more  DSD 2009»
15 years 7 months ago
Synthesizing Reversible Circuits for Irreversible Functions
Many reversible circuit synthesis procedures have been proposed. A common feature of most methods is that the initial specification must be a completely-specified reversible functi...
D. Michael Miller, Robert Wille, Gerhard W. Dueck
ASPDAC
2010
ACM
135views Hardware» more  ASPDAC 2010»
15 years 2 months ago
Statistical timing verification for transparently latched circuits through structural graph traversal
Level-sensitive transparent latches are widely used in high-performance sequential circuit designs. Under process variations, the timing of a transparently latched circuit will ada...
Xingliang Yuan, Jia Wang
ENTCS
2011
77views more  ENTCS 2011»
14 years 11 months ago
Quantum Circuits: From a Network to a One-Way Model
Abstract—We present elements of quantum circuits translations from the (standard) network or circuit model to the one-way one. We present a translation scheme, give an account of...
Larisse Voufo
145
Voted
DAC
2004
ACM
16 years 4 months ago
Placement feedback: a concept and method for better min-cut placements
The advent of strong multi-level partitioners has made topdown min-cut placers a favored choice for modern placer implementations. We examine terminal propagation, an important st...
Andrew B. Kahng, Sherief Reda